Alcatel 601E Deep Silicon Etch


This system etches micron-scale patterns into silicon.  The patterns are typically defined by a thin layer of silicon oxide which is patterned lithographically prior to etching. 
• Silicon is etched selectively relative to the oxide mask.
• Load-locked ICP system is optimized for high etch rate and high aspect ratio etching of silicon. 
• Vertical anisotropic deep plasma etching of silicon can be generally achieved by using two types of processes:
1. In the cryogenic process regime, an ultra-thin layer of silicon-dioxide is used for sidewall protection to control the mask undercut. 
2. In the room temperature process regime, thin fluoro-carbon polymer film is used for sidewall protection to control the mask undercut (patented Bosch process). 
• This system is configured for both the Bosch process and cryogenic etching.